CRC Generation and Error Detection Lab

Initial state 0 · MSB first · no reflection / final XOR · append zeros for generation.
Educational polynomial model, not a calculator for standards such as Ethernet. Calculations run in your browser.

Use 2–17 generator bits, starting and ending with 1. Example: 1011 → x³ + x + 1.

1. Transmitter CRC generation: XOR division

Register states: the same calculation, one bit at a time

Start with remainder zero and process from the left. Each row shows the state after a clock edge.

Input stepInput bitRemainder after processing

2. Receiver check: click bits to flip them

Check the complete codeword without appending zeros. Bit positions are 1, 2, 3… from the left.

Blue: message · Green: CRC field · Red: flipped bits

CRC generally does not locate errors or correct bits. Zero remainder means “no error detected.”